1. general description the 74lvt04 is a high-performance product designed for v cc operation at 3.3 v. the 74lvt04 provides six inverting buffers. 2. features and benefits ? ttl input and output switching levels ? latch-up protection ? jesd78 class ii exceeds 500 ma ? esd protection: ? hbm jesd22-a114e exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? specified from ? 40 ? c to +85 ? c 3. ordering information 74lvt04 3.3 v hex inverter rev. 2 ? 28 april 2014 product data sheet table 1. ordering information type number package temperature range name description version 74lvt04d ? 40 ? c to +85 ? c so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 74lvt04db ? 40 ? c to +85 ? c ssop14 plastic shrink small outline package; 14 leads; body width 5.3 mm sot337-1 74lvt04pw ? 40 ? c to +85 ? c tssop14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1
74lvt04 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights res erved. product data sheet rev. 2 ? 28 april 2014 2 of 13 nxp semiconductors 74lvt04 3.3 v hex inverter 4. functional diagram 5. pinning information 5.1 pinning fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram for one gate p q d $ < $ < $ < $ < $ < $ < p q d mna341 a y fig 4. pin configuration sot108-1 (so14), sot337-1 (ssop14) and sot402-1 (tssop14) 04 1a v cc 1y 6a 2a 6y 2y 5a 3a 5y 3y 4a gnd 4y 001aac915 1 2 3 4 5 6 7 8 10 9 12 11 14 13
74lvt04 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights res erved. product data sheet rev. 2 ? 28 april 2014 3 of 13 nxp semiconductors 74lvt04 3.3 v hex inverter 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. 7. limiting values [1] the input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. [2] the performance capability of a high-perfo rmance integrated circuit in conjunction with its thermal environment can create j unction temperatures which are detrimental to reliability. [3] for so14 packages: above 70 ? c derate linearly with 8 mw/k. for ssop14 and tssop14 packages: above 60 ? c derate linearly with 5.5 mw/k. table 2. pin description symbol pin description na 1, 3, 5, 9, 11, 13 data input ny 2, 4, 6, 8, 10, 12 data output gnd 7 ground (0 v) v cc 14 supply voltage table 3. function table [1] input output na ny lh hl table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +4.6 v v i input voltage [1] ? 0.5 +7.0 v v o output voltage output in off-state or high-state [1] ? 0.5 +7.0 v i ik input clamping current v i <0v ? 50 - ma i ok output clamping current v o <0v ? 50 - ma i o output current output in low-state - 64 ma output in high-state - ? 32 ma t stg storage temperature ? 65 +150 ?c t j junction temperature [2] - 150 ?c p tot total power dissipation t amb = ? 40 c to +85 c [3] - 500 mw
74lvt04 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights res erved. product data sheet rev. 2 ? 28 april 2014 4 of 13 nxp semiconductors 74lvt04 3.3 v hex inverter 8. recommended operating conditions 9. static characteristics [1] all typical values are at v cc = 3.3 v and t amb = 25 ? c. [2] this is the increase in supply current for each input at the specified voltage level other than v cc or gnd. table 5. recommended operating conditions symbol parameter conditions min max unit v cc supply voltage 2.7 3.6 v v i input voltage 0 5.5 v v ih high-level input voltage 2.0 - v v il low-level input voltage - 0.8 v i oh high-level output current - ? 20 ma i ol low-level output current - 32 ma t amb ambient temperature in free air ? 40 +85 ?c ? t/ ? v input transition rise and fall rate outputs enabled - 10 ns/v table 6. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c unit min typ [1] max v ik input clamp voltage v cc = 2.7 v; i ik = ? 18 ma - - ? 1.2 v v oh low-level input voltage v cc = 2.7 v to 3.6 v; i oh = ? 100 ? av cc ? 0.2 - - v v cc = 2.7 v; i oh = ? 6 ma 2.4 - - v v cc = 3.0 v; i oh = ? 20 ma 2.0 - - v v ol low-level output voltage v cc = 2.7 v; i ol = ? 100 ? a--0.2v v cc = 2.7 v; i ol = 24 ma - - 0.5 v v cc = 3.0 v; i ol = 32 ma - - 0.5 v i i input leakage current v cc = 0 v or 3.6 v; v i = 5.5 v - - 10 ? a v cc = 3.6 v; v i = v cc or gnd - - 1 ? a i off output off current v cc = 0 v; v i or v o = 0 v to 4.5 v - - 100 ? a i cch quiescent supply current v cc = 3.6 v; outputs high; v i = gnd or v cc , i o = 0 v - - 0.02 ma i ccl quiescent supply current v cc = 3.6 v; outputs low; v i = gnd or v cc ; i o = 0 v -1.53ma ? i cc additional supply current per input pin [2] v cc = 3 v to 3.6 v; one input at v cc ? 0.6 v; other inputs at v cc or gnd --0.2 ? a c i input capacitance v i = 3 v or 0 v - 3 - pf
74lvt04 all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2014. all rights res erved. product data sheet rev. 2 ? 28 april 2014 5 of 13 nxp semiconductors 74lvt04 3.3 v hex inverter 10. dynamic characteristics [1] all typical values are at v cc = 3.3 v and t amb = 25 ? c. 11. waveforms table 7. dynamic characteristics gnd = 0 v; for test circuit, see figure 6 . symbol parameter conditions ? 40 ? c to +85 ?c unit min typ [1] max t plh low to off-state propagation delay na to ny; see figure 5 v cc = 2.7 v - - 4.7 ns v cc = 3.3 v ? 0.3 v 1.0 2.6 3.9 ns t phl off-state to low propagation delay na to ny; see figure 5 ns v cc = 2.7 v - - 3.2 v cc = 3.3 v ? 0.3 v 1.0 2.5 3.5 ns v m = 50%; v i = gnd to v cc . v m = 1.5 v; v i = gnd to 2.7 v fig 5. the input na to output ny propagation delays p q d w 3 + / w 3 / + 9 0 9 0 9 0 9 0 q $ l q s x w q < |